Year 2013, Volume 9, Issue 1, Pages 1 - 9 2013-04-01

Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture
BZK.SAU.FPGA Mikro Bilgisayar Mimarisi için Ekran Alanı ve Karakter Organizasyonu ve Kontrolü

Halit Öztekin [1] , Ali Gülbağ [2] , Feyzullah Temurtaş [3]

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In order to obtain images in the display area, the color and synchronizing signals control signals of the VGA display hardware display hardware should be managed. Desired image is obtained with controlling these signals for lightening or deflating of pixels the display hardware. In this study, display controller that allows the formation of the image on the screen by controlling these signals was designed at logic gate level. BZK.SAU.FPGA mikro computer architecture was used and an VGA display with 640×480 pixel resolution was preferred for this purpose.
Ekran alanında görüntü elde edebilmek için VGA ekran donanımına ait kontrol sinyalleri olan renk ve senkronize sinyallerinin yönetilmesi gerekmektedir. Bu sinyaller kontrol edilerek ekran donanımındaki piksellerin yakılması veya söndürülmesi neticesinde istenilen görüntü elde edilir. Bu çalışmada, bu sinyalleri kontrol ederek ekrandaki görüntünün oluşmasını sağlayan ekran kontrolörü lojik kapı seviyesinde donanımsal olarak inşa edilmiştir. Bu amaçla, BZK.SAU.FPGA Mikro bilgisayar mimarisi kullanılmıştır ve 640×480 piksel çözünürlüğüne sahip VGA tipinde bir ekran tercih edilmiştir.
Subjects
Other ID JA95KH52PD
Journal Section Articles
Authors

Author: Halit Öztekin

Author: Ali Gülbağ

Author: Feyzullah Temurtaş

Bibtex @ { else313739, journal = {Electronic Letters on Science\&Engineering}, issn = {1305-8614}, address = {Bozok University}, year = {2013}, volume = {9}, pages = {1 - 9}, doi = {}, title = {Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture}, key = {cite}, author = {Öztekin, Halit and Gülbağ, Ali and Temurtaş, Feyzullah} }
APA Öztekin, H , Gülbağ, A , Temurtaş, F . (2013). Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science&Engineering, 9 (1), 1-9. Retrieved from http://dergipark.gov.tr/else/issue/29310/313739
MLA Öztekin, H , Gülbağ, A , Temurtaş, F . "Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture". Electronic Letters on Science&Engineering 9 (2013): 1-9 <http://dergipark.gov.tr/else/issue/29310/313739>
Chicago Öztekin, H , Gülbağ, A , Temurtaş, F . "Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture". Electronic Letters on Science&Engineering 9 (2013): 1-9
RIS TY - JOUR T1 - Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture AU - Halit Öztekin , Ali Gülbağ , Feyzullah Temurtaş Y1 - 2013 PY - 2013 N1 - DO - T2 - Electronic Letters on Science&Engineering JF - Journal JO - JOR SP - 1 EP - 9 VL - 9 IS - 1 SN - 1305-8614- M3 - UR - Y2 - 2019 ER -
EndNote %0 Electronic Letters on Science&Engineering Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture %A Halit Öztekin , Ali Gülbağ , Feyzullah Temurtaş %T Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture %D 2013 %J Electronic Letters on Science&Engineering %P 1305-8614- %V 9 %N 1 %R %U
ISNAD Öztekin, Halit , Gülbağ, Ali , Temurtaş, Feyzullah . "Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture". Electronic Letters on Science&Engineering 9 / 1 (April 2013): 1-9.